1. Technical Field
The present invention relates to a semiconductor memory test device and, more particularly, to a semiconductor memory test device in which uniform stress can be applied at a constant voltage to cells corresponding to entire wordlines.
2. Description of the Prior Art
The 2rb pattern stress represents a mode in which each of a pair of wordlines is alternately driven in a burn-in test. For example, wordlines WL0-WL7 can be classified into a unit pair of the wordlines (WL0, WL1), (WL2, WL3), (WL4, WL5) and (WL6, WL7), respectively. An enable state of this unit pair will be below explained. First, the wordlines (WL2, WL3) and (WL6, WL7) are disabled when the wordlines (WL0, WL1) and (WL4, WL5) are enabled, and the wordlines (WL0, WL1) and (WL4, WL5) are disabled when the wordlines (WL2, WL3) and (WL6, WL7) are enabled.
FIG. 1 is a block diagram of a conventional burn-in stress apparatus. A main wordline (mwl) is connected to a sub X-decoder 10 and the sub X-decoder 10 is also connected to a plurality of sub-wordlines wl0-wl7. A sub-hole 40 outputs eight wordline driver driving select signals (px<0:7>) to the sub X-decoder 10. A test mode decoder 20 decodes an input signal to produce an even wordline driving signal (even), an odd wordline driving signal (odd), the entire wordline driving signal (all), wordline driving signals (2rbe—with sa and 2rbo—with sa) and a normal sense amplifier enable signal (nsae) to a sense amplifier control unit 30. The sense amplifier control unit 30 outputs an inverted wordline driver driving select signal (pxz<0:7>), an inverted bit line equalizer signal (bleqz), a sense amplifier pull-up driving signal (rto) and an inverted sense amplifier pull-down driving signal (sz) to the sub-hole 40, depending on each of the signals received from the test mode decoder 20. A plurality of sense amplifiers 50 each sense and amplify data applied to bit lines bl, bl depending on a bit line equalizer signal (bleq), an inverted sense amplifier pull-up driving signal (rtoz) and a sense amplifier pull-down driving signal(s) from the sub-hole 40.
FIG. 2 is a detailed circuit diagram of the sense amplifier control unit in FIG. 1. An X-decoder 31 decodes an even wordline driving signal (even), an odd wordline driving signal (odd), the entire wordline driving signal (all) and a wordline driving signals (2rbe—with sa and 2rbo—with sa), which are received from the test mode decoder 20, to produce an inverted wordline driver driving select signal (pxz<0:7>) to the sub-hole 40. Also, a sense amplifier driving unit 32 outputs an inverted bit line equalizer signal (bleqz), a sense amplifier pull-up driving signal (rto), and an inverted sense amplifier pull-down driving signal (sz), for controlling the sense amplifier 50, to the sub-hole 40, depending on the wordline driving signals (2rbe—with sa and 2rbo—with sa) and the normal sense amplifier enable signal (nsae).
FIG. 3 is a detailed circuit diagram of the sense amplifier-driving unit 32 in FIG. 2. The sense amplifier driving unit 32 includes a NOR gate NOR1 for NORing the wordline driving signals (2rbe—with sa and 2rbo—with sa), and an inverter IV1 for inverting the normal sense amplifier enable signal (nsae). A NAND gate ND1 NANDs the output signals of the NOR gate NOR1 and the inverter IV1 and outputs a sense amplifier driving signal (sae). Inverters IV2 and IV3 delay the sense amplifier driving signal (sae), and then the inverter IV3 output an inverted bit line equalizer signal (bleqz). Inverters IV4 and IV5 delay the sense amplifier driving signal (sae), and then the inverter IV5 outputs a sense amplifier pull-up driving signal (rto). An inverter IV6 inverts the sense amplifier driving signal (sae) to produce an inverted sense amplifier pull-down driving signal (sz).
An operating procedure of the conventional burn-in stress apparatus having this structure is described below with reference to FIGS. 4–7.
In a process of manufacturing a general dynamic random access memory (DRAM), a method by which an artificial stress is applied between cell-to-cell, line-to-line and node-to-node at a high temperature burn-in mode in order to verify reliability and secure the quality is usually employed. One of the artificial stresses used is a 2rb pattern stress.
FIGS. 4–7 illustrate a process of applying stress in this 2rb pattern stress method, which includes enabling the wordlines WL by two and driving the sense amplifier so that HIGH or LOW signals are applied to corresponding cells and stress is applied between neighboring nodes.
FIG. 4 shows a case in which the even wordline-driving signal (even) is enabled and the sense amplifier driving signal (sae) is not outputted from the sense amplifier-driving unit 32. If the sense amplifier driving signal (sae) is disabled, the sense amplifier pull-up driving signal (rto) becomes HIGH, the inverted sense amplifier pull-down driving signal (sz) becomes LOW, and the bit line precharge signal (blp) and the bit line equalizer signal (bleq) become HIGH. At this time, the even (0, 2, 4, 6) wordlines WL0, WL2, WL4 and WL6 are selected and the bit line precharge voltage (Vblp) becomes LOW.
FIG. 5 shows a case in which the odd wordline-driving signal (odd) is enabled and the sense amplifier driving signal (sac) is not outputted from the sense amplifier-driving unit 32. In this case, the odd (1, 3, 5, 7) wordlines WL1, W13, WL5 and WL7 are selected and the bit line precharge voltage (Vblp) becomes HIGH.
FIG. 6 shows a case in which the wordline driving signal (2rbe) is enabled and the sense amplifier driving signal (sac) is outputted from the sense amplifier-driving unit 32. Also, the 2rbe wordlines WL0, WL1, WL4 and WL5 are enabled by the wordline driving signal (2rbe). At this time, if the sense amplifier driving signal (sac) is enabled to HIGH, the sense amplifier is driven to write HIGH and LOW into the bit lines bl, /bl, respectively, corresponding to the 2rbe wordlines WL0, WL1, WL4 and WL5 and a stress is applied to corresponding nodes via the bit lines bl, /bl for a predetermined time.
FIG. 7 shows a case in which the wordline driving signal (2rbo) is enabled and the sense amplifier driving signal (sac) is outputted from the sense amplifier-driving unit 32. Also, the 2rbo wordlines WL2, WL3, WL6 and WL7 are enabled by the wordline driving signal (2rbo). At this time, if the sense amplifier driving signal (sac) is enabled to HIGH, the sense amplifier is driven to write HIGH and LOW into the bit lines bl, /bl, respectively, corresponding to the 2rbo wordlines WL2, WL3, WL6 and WL7 and apply a stress to corresponding nodes via the bit lines bl, /bl for a predetermined time. An operating timing of the conventional burn-in stress apparatus is shown in FIG. 8.
However, this type of a conventional burn-in stress apparatus applies a stress to cell-to-cell, storage node contact (snc)-to-snc and snc-to-cell, while selectively enabling the wordlines corresponding to the wordline driving signals (2rbe and 2rbo).
At this time, the conventional burn-in stress apparatus enables the wordlines WL by dividing it into two units using the wordline driving signals (2rbe and 2rbo) and drives the sense amplifier. Therefore, there is a problem that the test time increases and a portion of the device is partially over-stressed and another portion of the device is relatively under-stressed.